Initial commit: CCU621_M firmware project with BLE debug link support.
Co-authored-by: Cursor <cursoragent@cursor.com>
This commit is contained in:
@@ -0,0 +1,448 @@
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/*!
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\file gd32h7xx_dci.c
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\brief DCI driver
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\version 2025-01-24, V1.4.0, firmware for GD32H7xx
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*/
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/*
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Copyright (c) 2025, GigaDevice Semiconductor Inc.
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Redistribution and use in source and binary forms, with or without modification,
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are permitted provided that the following conditions are met:
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1. Redistributions of source code must retain the above copyright notice, this
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list of conditions and the following disclaimer.
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2. Redistributions in binary form must reproduce the above copyright notice,
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this list of conditions and the following disclaimer in the documentation
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and/or other materials provided with the distribution.
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3. Neither the name of the copyright holder nor the names of its contributors
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may be used to endorse or promote products derived from this software without
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specific prior written permission.
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THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
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AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
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WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
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IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
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INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
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NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR
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PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
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WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
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ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY
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OF SUCH DAMAGE.
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*/
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#include "gd32h7xx_dci.h"
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/*!
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\brief DCI deinit
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\param[in] none
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\param[out] none
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\retval none
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*/
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void dci_deinit(void)
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{
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rcu_periph_reset_enable(RCU_DCIRST);
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rcu_periph_reset_disable(RCU_DCIRST);
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}
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/*!
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\brief initialize DCI registers
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\param[in] dci_struct: DCI parameter initialization structure
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members of the structure and the member values are shown as below:
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capture_mode : DCI_CAPTURE_MODE_CONTINUOUS, DCI_CAPTURE_MODE_SNAPSHOT
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colck_polarity : DCI_CK_POLARITY_FALLING, DCI_CK_POLARITY_RISING
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hsync_polarity : DCI_HSYNC_POLARITY_LOW, DCI_HSYNC_POLARITY_HIGH
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vsync_polarity : DCI_VSYNC_POLARITY_LOW, DCI_VSYNC_POLARITY_HIGH
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frame_rate : DCI_FRAME_RATE_ALL, DCI_FRAME_RATE_1_2, DCI_FRAME_RATE_1_4
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interface_format: DCI_INTERFACE_FORMAT_8BITS, DCI_INTERFACE_FORMAT_10BITS,
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DCI_INTERFACE_FORMAT_12BITS, DCI_INTERFACE_FORMAT_14BITS
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\param[out] none
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\retval none
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*/
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void dci_init(dci_parameter_struct *dci_struct)
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{
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uint32_t reg = 0U;
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/* disable capture function and DCI */
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DCI_CTL &= ~(DCI_CTL_CAP | DCI_CTL_DCIEN);
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/* configure DCI parameter */
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reg |= dci_struct->capture_mode;
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reg |= dci_struct->clock_polarity;
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reg |= dci_struct->hsync_polarity;
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reg |= dci_struct->vsync_polarity;
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reg |= dci_struct->frame_rate;
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reg |= dci_struct->interface_format;
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DCI_CTL = reg;
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}
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/*!
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\brief enable DCI function
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\param[in] none
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\param[out] none
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\retval none
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*/
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void dci_enable(void)
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{
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DCI_CTL |= DCI_CTL_DCIEN;
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}
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/*!
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\brief disable DCI function
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\param[in] none
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\param[out] none
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\retval none
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*/
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void dci_disable(void)
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{
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DCI_CTL &= ~DCI_CTL_DCIEN;
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}
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/*!
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\brief enable DCI capture
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\param[in] none
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\param[out] none
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\retval none
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*/
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void dci_capture_enable(void)
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{
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DCI_CTL |= DCI_CTL_CAP;
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}
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/*!
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\brief disable DCI capture
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\param[in] none
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\param[out] none
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\retval none
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*/
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void dci_capture_disable(void)
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{
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DCI_CTL &= ~DCI_CTL_CAP;
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}
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/*!
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\brief enable DCI external vsync function in CCIR progressive mode
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\param[in] none
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\param[out] none
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\retval none
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*/
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void dci_external_vsync_enable(void)
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{
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DCI_CTL |= DCI_CTL_EVSEN;
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}
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/*!
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\brief disable DCI external vsync function in CCIR progressive mode
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\param[in] none
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\param[out] none
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\retval none
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*/
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void dci_external_vsync_disable(void)
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{
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DCI_CTL &= ~DCI_CTL_EVSEN;
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}
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/*!
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\brief enable DCI automatic error correction function in CCIR interlaced mode
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\param[in] none
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\param[out] none
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\retval none
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*/
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void dci_automatic_error_correction_enable(void)
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{
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DCI_CTL |= DCI_CTL_AECEN;
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}
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/*!
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\brief disable DCI automatic error correction function in CCIR interlaced mode
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\param[in] none
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\param[out] none
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\retval none
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*/
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void dci_automatic_error_correction_disable(void)
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{
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DCI_CTL &= ~DCI_CTL_AECEN;
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}
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/*!
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\brief enable DCI jpeg mode
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\param[in] none
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\param[out] none
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\retval none
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*/
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void dci_jpeg_enable(void)
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{
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DCI_CTL |= DCI_CTL_JM;
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}
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/*!
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\brief disable DCI jpeg mode
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\param[in] none
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\param[out] none
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\retval none
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*/
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void dci_jpeg_disable(void)
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{
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DCI_CTL &= ~DCI_CTL_JM;
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}
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/*!
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\brief enable cropping window function
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\param[in] none
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\param[out] none
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\retval none
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*/
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void dci_crop_window_enable(void)
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{
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DCI_CTL |= DCI_CTL_WDEN;
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}
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/*!
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\brief disable cropping window function
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\param[in] none
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\param[out] none
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\retval none
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*/
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void dci_crop_window_disable(void)
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{
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DCI_CTL &= ~DCI_CTL_WDEN;
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}
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/*!
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\brief configure DCI cropping window
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\param[in] start_x: window horizontal start position
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\param[in] start_y: window vertical start position
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\param[in] size_width: window horizontal size
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\param[in] size_height: window vertical size
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\param[out] none
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\retval none
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*/
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void dci_crop_window_config(uint16_t start_x, uint16_t start_y, uint16_t size_width, uint16_t size_height)
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{
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DCI_CWSPOS = ((uint32_t)start_x | ((uint32_t)start_y << 16U));
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DCI_CWSZ = ((uint32_t)size_width | ((uint32_t)size_height << 16U));
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}
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/*!
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\brief enable embedded synchronous mode
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\param[in] none
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\param[out] none
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\retval none
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*/
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void dci_embedded_sync_enable(void)
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{
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DCI_CTL |= DCI_CTL_ESM;
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}
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/*!
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\brief disble embedded synchronous mode
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\param[in] none
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\param[out] none
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\retval none
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*/
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void dci_embedded_sync_disable(void)
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{
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DCI_CTL &= ~DCI_CTL_ESM;
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}
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/*!
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\brief CCIR mode enable
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\param[in] none
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\param[out] none
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\retval none
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*/
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void dci_ccir_enable(void)
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{
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DCI_CTL |= DCI_CTL_CCEN;
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}
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/*!
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\brief CCIR mode disable
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\param[in] none
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\param[out] none
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\retval none
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*/
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void dci_ccir_disable(void)
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{
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DCI_CTL &= ~DCI_CTL_CCEN;
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}
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/*!
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\brief CCIR mode select
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\param[in] ccir_mode: specify which mode to select
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only one parameter can be selected which is shown as below:
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\arg CCIR_PROGRESSIVE_MODE: CCIR progressive mode
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\arg CCIR_INTERLACE_MODE: CCIR interlace mode
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\param[out] none
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\retval none
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*/
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void dci_ccir_mode_select(uint32_t ccir_mode)
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{
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if(CCIR_INTERLACE_MODE == ccir_mode) {
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DCI_CTL |= DCI_CTL_CCMOD;
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} else {
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DCI_CTL &= ~DCI_CTL_CCMOD;
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}
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}
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/*!
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\brief config synchronous codes in embedded synchronous mode
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\param[in] frame_start: frame start code in embedded synchronous mode
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\param[in] line_start: line start code in embedded synchronous mode
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\param[in] line_end: line end code in embedded synchronous mode
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\param[in] frame_end: frame end code in embedded synchronous mode
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\param[out] none
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\retval none
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*/
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void dci_sync_codes_config(uint8_t frame_start, uint8_t line_start, uint8_t line_end, uint8_t frame_end)
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{
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DCI_SC = ((uint32_t)frame_start | ((uint32_t)line_start << 8U) | \
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((uint32_t)line_end << 16U) | ((uint32_t)frame_end << 24U));
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}
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/*!
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\brief config synchronous codes unmask in embedded synchronous mode
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\param[in] frame_start: frame start code unmask bits in embedded synchronous mode
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\param[in] line_start: line start code unmask bits in embedded synchronous mode
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\param[in] line_end: line end code unmask bits in embedded synchronous mode
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\param[in] frame_end: frame end code unmask bits in embedded synchronous mode
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\param[out] none
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\retval none
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*/
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void dci_sync_codes_unmask_config(uint8_t frame_start, uint8_t line_start, uint8_t line_end, uint8_t frame_end)
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{
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DCI_SCUMSK = ((uint32_t)frame_start | ((uint32_t)line_start << 8U) | \
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((uint32_t)line_end << 16U) | ((uint32_t)frame_end << 24U));
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}
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/*!
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\brief read DCI data register
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\param[in] none
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\param[out] none
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\retval data
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*/
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uint32_t dci_data_read(void)
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{
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return DCI_DATA;
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}
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/*!
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\brief get specified flag
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\param[in] flag: specify which flag to get
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only one parameter can be selected which is shown as below:
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\arg DCI_FLAG_HS: HS line status
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\arg DCI_FLAG_VS: VS line status
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\arg DCI_FLAG_FV: FIFO valid
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\arg DCI_FLAG_EF: end of frame flag
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\arg DCI_FLAG_OVR: FIFO overrun flag
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\arg DCI_FLAG_ESE: embedded synchronous error flag
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\arg DCI_FLAG_VSYNC: vsync flag
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\arg DCI_FLAG_EL: end of line flag
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\param[out] none
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\retval FlagStatus: SET or RESET
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*/
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FlagStatus dci_flag_get(uint32_t flag)
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{
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uint32_t stat = 0U;
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if(flag >> 31U) {
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/* get flag status from DCI_STAT1 register */
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stat = DCI_STAT1;
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} else {
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/* get flag status from DCI_STAT0 register */
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stat = DCI_STAT0;
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}
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if(flag & stat) {
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return SET;
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} else {
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return RESET;
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}
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}
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/*!
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\brief enable specified DCI interrupt
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\param[in] interrupt: specify which interrupt to enable
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one or more parameter can be selected which is shown as below:
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\arg DCI_INT_EF: end of frame interrupt
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\arg DCI_INT_OVR: FIFO overrun interrupt
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\arg DCI_INT_ESE: embedded synchronous error interrupt
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\arg DCI_INT_VSYNC: vsync interrupt
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\arg DCI_INT_EL: end of line interrupt
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\arg DCI_INT_F0: CCIR field 0 interrupt
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\arg DCI_INT_F1: CCIR field 1 interrupt
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\arg DCI_INT_COF: CCIR change of field interrupt
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\arg DCI_INT_CCE: CCIR error interrupt
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\param[out] none
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\retval none
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*/
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void dci_interrupt_enable(uint32_t interrupt)
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{
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DCI_INTEN |= interrupt;
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}
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/*!
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\brief disable specified DCI interrupt
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\param[in] interrupt: specify which interrupt to disable
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one or more parameter can be selected which is shown as below:
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\arg DCI_INT_EF: end of frame interrupt
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\arg DCI_INT_OVR: FIFO overrun interrupt
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\arg DCI_INT_ESE: embedded synchronous error interrupt
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\arg DCI_INT_VSYNC: vsync interrupt
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\arg DCI_INT_EL: end of line interrupt
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\arg DCI_INT_F0: CCIR field 0 interrupt
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\arg DCI_INT_F1: CCIR field 1 interrupt
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\arg DCI_INT_COF: CCIR change of field interrupt
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\arg DCI_INT_CCE: CCIR error interrupt
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\param[out] none
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\retval none
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*/
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void dci_interrupt_disable(uint32_t interrupt)
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{
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DCI_INTEN &= ~interrupt;
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}
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/*!
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\brief get specified interrupt flag
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\param[in] int_flag: specify which flag to get
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one or more parameter can be selected which is shown as below:
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\arg DCI_INT_FLAG_EF: end of frame interrupt flag
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\arg DCI_INT_FLAG_OVR: FIFO overrun interrupt flag
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\arg DCI_INT_FLAG_ESE: embedded synchronous error interrupt flag
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\arg DCI_INT_FLAG_VSYNC: vsync interrupt flag
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\arg DCI_INT_FLAG_EL: end of line interrupt flag
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\arg DCI_INT_FLAG_F0: CCIR field 0 interrupt flag
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\arg DCI_INT_FLAG_F1: CCIR field 1 interrupt flag
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\arg DCI_INT_FLAG_COF: CCIR change of field interrupt flag
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\arg DCI_INT_FLAG_CCE: CCIR error interrupt flag
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\param[out] none
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\retval FlagStatus: SET or RESET
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*/
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FlagStatus dci_interrupt_flag_get(uint32_t int_flag)
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{
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if(RESET == (DCI_INTF & int_flag)) {
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return RESET;
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} else {
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return SET;
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}
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}
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/*!
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\brief clear specified interrupt flag
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\param[in] int_flag: specify which flag to clear
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one or more parameter can be selected which is shown as below:
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\arg DCI_INT_FLAG_EF: end of frame interrupt flag
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\arg DCI_INT_FLAG_OVR: FIFO overrun interrupt flag
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\arg DCI_INT_FLAG_ESE: embedded synchronous error interrupt flag
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\arg DCI_INT_FLAG_VSYNC: vsync interrupt flag
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\arg DCI_INT_FLAG_EL: end of line interrupt flag
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\arg DCI_INT_FLAG_COF: CCIR change of field interrupt flag
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\arg DCI_INT_FLAG_CCE: CCIR error interrupt flag
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\param[out] none
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\retval none
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*/
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void dci_interrupt_flag_clear(uint32_t int_flag)
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{
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DCI_INTC |= int_flag;
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}
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