Initial commit: CCU621_M firmware project with BLE debug link support.
Co-authored-by: Cursor <cursoragent@cursor.com>
This commit is contained in:
@@ -0,0 +1,395 @@
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/*!
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\file gd32h7xx_rameccmu.c
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\brief RAMECCMU driver
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\version 2025-01-24, V1.4.0, firmware for GD32H7xx
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*/
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/*
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Copyright (c) 2025, GigaDevice Semiconductor Inc.
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Redistribution and use in source and binary forms, with or without modification,
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are permitted provided that the following conditions are met:
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1. Redistributions of source code must retain the above copyright notice, this
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list of conditions and the following disclaimer.
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2. Redistributions in binary form must reproduce the above copyright notice,
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this list of conditions and the following disclaimer in the documentation
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and/or other materials provided with the distribution.
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3. Neither the name of the copyright holder nor the names of its contributors
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may be used to endorse or promote products derived from this software without
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specific prior written permission.
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THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
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AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
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WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
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IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
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INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
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NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR
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PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
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WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
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ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY
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OF SUCH DAMAGE.
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*/
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#include "gd32h7xx_rameccmu.h"
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#define RAMECCMU_REG_RESET_VALUE 0x00000000U
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/*!
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\brief deinit RAMECCMU unit
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\param[in] rameccmu_periph: RAMECCMUx(x=0,1)
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\param[out] none
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\retval none
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*/
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void rameccmu_deinit(uint32_t rameccmu_periph)
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{
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RAMECCMU_INT(rameccmu_periph) = RAMECCMU_REG_RESET_VALUE;
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if(RAMECCMU0 == rameccmu_periph){
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/* reset RAMECCMU0_MONITOR0 registers */
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RAMECCMU_MXCTL(RAMECCMU0_MONITOR0) = RAMECCMU_REG_RESET_VALUE;
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RAMECCMU_MXSTAT(RAMECCMU0_MONITOR0) = RAMECCMU_REG_RESET_VALUE;
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RAMECCMU_MXFADDR(RAMECCMU0_MONITOR0) = RAMECCMU_REG_RESET_VALUE;
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RAMECCMU_MXFDL(RAMECCMU0_MONITOR0) = RAMECCMU_REG_RESET_VALUE;
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RAMECCMU_MXFDH(RAMECCMU0_MONITOR0) = RAMECCMU_REG_RESET_VALUE;
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RAMECCMU_MXFECODE(RAMECCMU0_MONITOR0) = RAMECCMU_REG_RESET_VALUE;
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/* reset RAMECCMU0_MONITOR1 registers */
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RAMECCMU_MXCTL(RAMECCMU0_MONITOR1) = RAMECCMU_REG_RESET_VALUE;
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RAMECCMU_MXSTAT(RAMECCMU0_MONITOR1) = RAMECCMU_REG_RESET_VALUE;
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RAMECCMU_MXFADDR(RAMECCMU0_MONITOR1) = RAMECCMU_REG_RESET_VALUE;
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RAMECCMU_MXFDL(RAMECCMU0_MONITOR1) = RAMECCMU_REG_RESET_VALUE;
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RAMECCMU_MXFDH(RAMECCMU0_MONITOR1) = RAMECCMU_REG_RESET_VALUE;
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RAMECCMU_MXFECODE(RAMECCMU0_MONITOR1) = RAMECCMU_REG_RESET_VALUE;
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/* reset RAMECCMU0_MONITOR2 registers */
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RAMECCMU_MXCTL(RAMECCMU0_MONITOR2) = RAMECCMU_REG_RESET_VALUE;
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RAMECCMU_MXSTAT(RAMECCMU0_MONITOR2) = RAMECCMU_REG_RESET_VALUE;
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RAMECCMU_MXFADDR(RAMECCMU0_MONITOR2) = RAMECCMU_REG_RESET_VALUE;
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RAMECCMU_MXFDL(RAMECCMU0_MONITOR2) = RAMECCMU_REG_RESET_VALUE;
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RAMECCMU_MXFDH(RAMECCMU0_MONITOR2) = RAMECCMU_REG_RESET_VALUE;
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RAMECCMU_MXFECODE(RAMECCMU0_MONITOR2) = RAMECCMU_REG_RESET_VALUE;
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/* reset RAMECCMU0_MONITOR3 registers */
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RAMECCMU_MXCTL(RAMECCMU0_MONITOR3) = RAMECCMU_REG_RESET_VALUE;
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RAMECCMU_MXSTAT(RAMECCMU0_MONITOR3) = RAMECCMU_REG_RESET_VALUE;
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RAMECCMU_MXFADDR(RAMECCMU0_MONITOR3) = RAMECCMU_REG_RESET_VALUE;
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RAMECCMU_MXFDL(RAMECCMU0_MONITOR3) = RAMECCMU_REG_RESET_VALUE;
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RAMECCMU_MXFDH(RAMECCMU0_MONITOR3) = RAMECCMU_REG_RESET_VALUE;
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RAMECCMU_MXFECODE(RAMECCMU0_MONITOR3) = RAMECCMU_REG_RESET_VALUE;
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/* reset RAMECCMU0_MONITOR4 registers */
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RAMECCMU_MXCTL(RAMECCMU0_MONITOR4) = RAMECCMU_REG_RESET_VALUE;
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RAMECCMU_MXSTAT(RAMECCMU0_MONITOR4) = RAMECCMU_REG_RESET_VALUE;
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RAMECCMU_MXFADDR(RAMECCMU0_MONITOR4) = RAMECCMU_REG_RESET_VALUE;
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RAMECCMU_MXFDL(RAMECCMU0_MONITOR4) = RAMECCMU_REG_RESET_VALUE;
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RAMECCMU_MXFDH(RAMECCMU0_MONITOR4) = RAMECCMU_REG_RESET_VALUE;
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RAMECCMU_MXFECODE(RAMECCMU0_MONITOR4) = RAMECCMU_REG_RESET_VALUE;
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}else{
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/* reset RAMECCMU1_MONITOR0 registers */
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RAMECCMU_MXCTL(RAMECCMU1_MONITOR0) = RAMECCMU_REG_RESET_VALUE;
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RAMECCMU_MXSTAT(RAMECCMU1_MONITOR0) = RAMECCMU_REG_RESET_VALUE;
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RAMECCMU_MXFADDR(RAMECCMU1_MONITOR0) = RAMECCMU_REG_RESET_VALUE;
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RAMECCMU_MXFDL(RAMECCMU1_MONITOR0) = RAMECCMU_REG_RESET_VALUE;
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RAMECCMU_MXFDH(RAMECCMU1_MONITOR0) = RAMECCMU_REG_RESET_VALUE;
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RAMECCMU_MXFECODE(RAMECCMU1_MONITOR0) = RAMECCMU_REG_RESET_VALUE;
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/* reset RAMECCMU1_MONITOR1 registers */
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RAMECCMU_MXCTL(RAMECCMU1_MONITOR1) = RAMECCMU_REG_RESET_VALUE;
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RAMECCMU_MXSTAT(RAMECCMU1_MONITOR1) = RAMECCMU_REG_RESET_VALUE;
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RAMECCMU_MXFADDR(RAMECCMU1_MONITOR1) = RAMECCMU_REG_RESET_VALUE;
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RAMECCMU_MXFDL(RAMECCMU1_MONITOR1) = RAMECCMU_REG_RESET_VALUE;
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RAMECCMU_MXFDH(RAMECCMU1_MONITOR1) = RAMECCMU_REG_RESET_VALUE;
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RAMECCMU_MXFECODE(RAMECCMU1_MONITOR1) = RAMECCMU_REG_RESET_VALUE;
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/* reset RAMECCMU1_MONITOR2 registers */
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RAMECCMU_MXCTL(RAMECCMU1_MONITOR2) = RAMECCMU_REG_RESET_VALUE;
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RAMECCMU_MXSTAT(RAMECCMU1_MONITOR2) = RAMECCMU_REG_RESET_VALUE;
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RAMECCMU_MXFADDR(RAMECCMU1_MONITOR2) = RAMECCMU_REG_RESET_VALUE;
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RAMECCMU_MXFDL(RAMECCMU1_MONITOR2) = RAMECCMU_REG_RESET_VALUE;
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RAMECCMU_MXFDH(RAMECCMU1_MONITOR2) = RAMECCMU_REG_RESET_VALUE;
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RAMECCMU_MXFECODE(RAMECCMU1_MONITOR2) = RAMECCMU_REG_RESET_VALUE;
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}
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}
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/*!
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\brief get RAMECCMU monitor ECC failing address
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\param[in] rameccmu_monitor: RAMECCMU monitor
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only one parameter can be selected which is shown as below:
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\arg RAMECCMU0_MONITOR0: RAMECCMU0 monitor 0
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\arg RAMECCMU0_MONITOR1: RAMECCMU0 monitor 1
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\arg RAMECCMU0_MONITOR2: RAMECCMU0 monitor 2
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\arg RAMECCMU0_MONITOR3: RAMECCMU0 monitor 3
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\arg RAMECCMU0_MONITOR4: RAMECCMU0 monitor 4
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\arg RAMECCMU1_MONITOR0: RAMECCMU1 monitor 0
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\arg RAMECCMU1_MONITOR1: RAMECCMU1 monitor 1
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\arg RAMECCMU1_MONITOR2: RAMECCMU1 monitor 2
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\param[out] none
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\retval ECC error failing address
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*/
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uint32_t rameccmu_monitor_failing_address_get(rameccmu_monitor_enum rameccmu_monitor)
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{
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return RAMECCMU_MXFADDR(rameccmu_monitor);
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}
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/*!
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\brief get RAMECCMU monitor ECC failing data low 32 bits
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\param[in] rameccmu_monitor: RAMECCMU monitor
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only one parameter can be selected which is shown as below:
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\arg RAMECCMU0_MONITOR0: RAMECCMU0 monitor 0
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\arg RAMECCMU0_MONITOR1: RAMECCMU0 monitor 1
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\arg RAMECCMU0_MONITOR2: RAMECCMU0 monitor 2
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\arg RAMECCMU0_MONITOR3: RAMECCMU0 monitor 3
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\arg RAMECCMU0_MONITOR4: RAMECCMU0 monitor 4
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\arg RAMECCMU1_MONITOR0: RAMECCMU1 monitor 0
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\arg RAMECCMU1_MONITOR1: RAMECCMU1 monitor 1
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\arg RAMECCMU1_MONITOR2: RAMECCMU1 monitor 2
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\param[out] none
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\retval ECC failing data low 32 bits
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*/
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uint32_t rameccmu_monitor_failing_data_low_bits_get(rameccmu_monitor_enum rameccmu_monitor)
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{
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return RAMECCMU_MXFDL(rameccmu_monitor);
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}
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/*!
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\brief get RAMECCMU monitor ECC failing data high 32 bits
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\param[in] rameccmu_monitor: RAMECCMU monitor
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only one parameter can be selected which is shown as below:
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\arg RAMECCMU0_MONITOR0: RAMECCMU0 monitor 0
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\arg RAMECCMU0_MONITOR1: RAMECCMU0 monitor 1
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\arg RAMECCMU0_MONITOR2: RAMECCMU0 monitor 2
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\arg RAMECCMU0_MONITOR3: RAMECCMU0 monitor 3
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\arg RAMECCMU0_MONITOR4: RAMECCMU0 monitor 4
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\arg RAMECCMU1_MONITOR0: RAMECCMU1 monitor 0
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\arg RAMECCMU1_MONITOR1: RAMECCMU1 monitor 1
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\arg RAMECCMU1_MONITOR2: RAMECCMU1 monitor 2
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\param[out] none
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\retval ECC failing data high 32 bits
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*/
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uint32_t rameccmu_monitor_failing_data_high_bits_get(rameccmu_monitor_enum rameccmu_monitor)
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{
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return RAMECCMU_MXFDH(rameccmu_monitor);
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}
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/*!
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\brief get RAMECCMU monitor failing ECC error code
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\param[in] rameccmu_monitor: RAMECCMU monitor
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only one parameter can be selected which is shown as below:
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\arg RAMECCMU0_MONITOR0: RAMECCMU0 monitor 0
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\arg RAMECCMU0_MONITOR1: RAMECCMU0 monitor 1
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\arg RAMECCMU0_MONITOR2: RAMECCMU0 monitor 2
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\arg RAMECCMU0_MONITOR3: RAMECCMU0 monitor 3
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\arg RAMECCMU0_MONITOR4: RAMECCMU0 monitor 4
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\arg RAMECCMU1_MONITOR0: RAMECCMU1 monitor 0
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\arg RAMECCMU1_MONITOR1: RAMECCMU1 monitor 1
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\arg RAMECCMU1_MONITOR2: RAMECCMU1 monitor 2
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\param[out] none
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\retval ECC failing error code
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*/
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uint32_t rameccmu_monitor_failing_ecc_error_code_get(rameccmu_monitor_enum rameccmu_monitor)
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{
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return RAMECCMU_MXFECODE(rameccmu_monitor);
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}
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/*!
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\brief enable RAMECCMU global ECC interruput
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\param[in] rameccmu_periph: RAMECCMU
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only one parameter can be selected which is shown as below:
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\arg RAMECCMU0: RAMECCMU for region 0
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\arg RAMECCMU1: RAMECCMU for region 1
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\param[in] interrupt: global ECC interruput
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one or more parameters can be selected which are shown as below:
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\arg RAMECCMU_INT_ECC_GLOBAL_ERROR: ECC global error interrupt
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\arg RAMECCMU_INT_ECC_SINGLE_ERROR: ECC single error interrupt
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\arg RAMECCMU_INT_ECC_DOUBLE_ERROR: ECC double error interrupt
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\arg RAMECCMU_INT_ECC_DOUBLE_ERROR_BYTE_WRITE: ECC double error on byte write interrupt
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\param[out] none
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\retval none
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*/
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void rameccmu_global_interrupt_enable(uint32_t rameccmu_periph, uint32_t interrupt)
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{
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RAMECCMU_INT(rameccmu_periph) |= interrupt;
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}
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/*!
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\brief disable RAMECCMU global ECC interruput
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\param[in] rameccmu_periph: RAMECCMU
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only one parameter can be selected which is shown as below:
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\arg RAMECCMU0: RAMECCMU for region 0
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\arg RAMECCMU1: RAMECCMU for region 1
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\param[in] interrupt: global ECC interruput
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one or more parameters can be selected which are shown as below:
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\arg RAMECCMU_INT_ECC_GLOBAL_ERROR: ECC global error interrupt
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\arg RAMECCMU_INT_ECC_SINGLE_ERROR: ECC single error interrupt
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\arg RAMECCMU_INT_ECC_DOUBLE_ERROR: ECC double error interrupt
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\arg RAMECCMU_INT_ECC_DOUBLE_ERROR_BYTE_WRITE: ECC double error on byte write interrupt
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\param[out] none
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\retval none
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*/
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void rameccmu_global_interrupt_disable(uint32_t rameccmu_periph, uint32_t interrupt)
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{
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RAMECCMU_INT(rameccmu_periph) &= (uint32_t)(~interrupt);
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}
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/*!
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\brief enable RAMECCMU monitor ECC error interruput
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\param[in] rameccmu_monitor: RAMECCMU monitor
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only one parameter can be selected which is shown as below:
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\arg RAMECCMU0_MONITOR0: RAMECCMU0 monitor 0
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\arg RAMECCMU0_MONITOR1: RAMECCMU0 monitor 1
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\arg RAMECCMU0_MONITOR2: RAMECCMU0 monitor 2
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\arg RAMECCMU0_MONITOR3: RAMECCMU0 monitor 3
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\arg RAMECCMU0_MONITOR4: RAMECCMU0 monitor 4
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\arg RAMECCMU1_MONITOR0: RAMECCMU1 monitor 0
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\arg RAMECCMU1_MONITOR1: RAMECCMU1 monitor 1
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\arg RAMECCMU1_MONITOR2: RAMECCMU1 monitor 2
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\param[in] monitor_interrupt: RAMECCMU monitor interruput
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one or more parameters can be selected which are shown as below:
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\arg RAMECCMU_INT_ECC_SINGLE_ERROR: ECC single error interrupt
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\arg RAMECCMU_INT_ECC_DOUBLE_ERROR: ECC double error interrupt
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\arg RAMECCMU_INT_ECC_DOUBLE_ERROR_BYTE_WRITE: ECC double error on byte write interrupt
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\arg RAMECCMU_INT_ECC_ERROR_LATCHING: ECC error latching
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\param[out] none
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\retval none
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*/
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void rameccmu_monitor_interrupt_enable(rameccmu_monitor_enum rameccmu_monitor, uint32_t monitor_interrupt)
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{
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RAMECCMU_MXCTL(rameccmu_monitor) |= (uint32_t)monitor_interrupt << 1U;
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}
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/*!
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\brief disable RAMECCMU monitor ECC error interruput
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\param[in] rameccmu_monitor: RAMECCMU monitor
|
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only one parameter can be selected which is shown as below:
|
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\arg RAMECCMU0_MONITOR0: RAMECCMU0 monitor 0
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\arg RAMECCMU0_MONITOR1: RAMECCMU0 monitor 1
|
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\arg RAMECCMU0_MONITOR2: RAMECCMU0 monitor 2
|
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\arg RAMECCMU0_MONITOR3: RAMECCMU0 monitor 3
|
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\arg RAMECCMU0_MONITOR4: RAMECCMU0 monitor 4
|
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\arg RAMECCMU1_MONITOR0: RAMECCMU1 monitor 0
|
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\arg RAMECCMU1_MONITOR1: RAMECCMU1 monitor 1
|
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\arg RAMECCMU1_MONITOR2: RAMECCMU1 monitor 2
|
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\param[in] monitor_interrupt: RAMECCMU monitor interruput
|
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one or more parameters can be selected which are shown as below:
|
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\arg RAMECCMU_INT_ECC_SINGLE_ERROR: ECC single error interrupt
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\arg RAMECCMU_INT_ECC_DOUBLE_ERROR: ECC double error interrupt
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\arg RAMECCMU_INT_ECC_DOUBLE_ERROR_BYTE_WRITE: ECC double error on byte write interrupt
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\arg RAMECCMU_INT_ECC_ERROR_LATCHING: ECC error latching
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\param[out] none
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\retval none
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*/
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void rameccmu_monitor_interrupt_disable(rameccmu_monitor_enum rameccmu_monitor, uint32_t monitor_interrupt)
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{
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RAMECCMU_MXCTL(rameccmu_monitor) &= (uint32_t)~((uint32_t)monitor_interrupt << 1U);
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}
|
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|
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/*!
|
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\brief get RAMECCMU monitor ECC error flag
|
||||
\param[in] rameccmu_monitor: RAMECCMU monitor
|
||||
only one parameter can be selected which is shown as below:
|
||||
\arg RAMECCMU0_MONITOR0: RAMECCMU0 monitor 0
|
||||
\arg RAMECCMU0_MONITOR1: RAMECCMU0 monitor 1
|
||||
\arg RAMECCMU0_MONITOR2: RAMECCMU0 monitor 2
|
||||
\arg RAMECCMU0_MONITOR3: RAMECCMU0 monitor 3
|
||||
\arg RAMECCMU0_MONITOR4: RAMECCMU0 monitor 4
|
||||
\arg RAMECCMU1_MONITOR0: RAMECCMU1 monitor 0
|
||||
\arg RAMECCMU1_MONITOR1: RAMECCMU1 monitor 1
|
||||
\arg RAMECCMU1_MONITOR2: RAMECCMU1 monitor 2
|
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\param[in] flag: RAMECCMU monitor flag
|
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one or more parameters can be selected which are shown as below:
|
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\arg RAMECCMU_FLAG_ECC_SINGLE_ERROR: ECC single error detected and corrected flag
|
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\arg RAMECCMU_FLAG_ECC_DOUBLE_ERROR: ECC double error detected flag
|
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\arg RAMECCMU_FLAG_ECC_DOUBLE_ERROR_BYTE_WRITE: ECC double error on byte write detected flag
|
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\param[out] none
|
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\retval RESET or SET
|
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*/
|
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FlagStatus rameccmu_monitor_flag_get(rameccmu_monitor_enum rameccmu_monitor, uint32_t flag)
|
||||
{
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if(RESET != ((RAMECCMU_MXSTAT(rameccmu_monitor)) & flag)){
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return SET;
|
||||
}else{
|
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return RESET;
|
||||
}
|
||||
}
|
||||
|
||||
/*!
|
||||
\brief clear RAMECCMU monitor ECC error flag
|
||||
\param[in] rameccmu_monitor: RAMECCMU monitor
|
||||
only one parameter can be selected which is shown as below:
|
||||
\arg RAMECCMU0_MONITOR0: RAMECCMU0 monitor 0
|
||||
\arg RAMECCMU0_MONITOR1: RAMECCMU0 monitor 1
|
||||
\arg RAMECCMU0_MONITOR2: RAMECCMU0 monitor 2
|
||||
\arg RAMECCMU0_MONITOR3: RAMECCMU0 monitor 3
|
||||
\arg RAMECCMU0_MONITOR4: RAMECCMU0 monitor 4
|
||||
\arg RAMECCMU1_MONITOR0: RAMECCMU1 monitor 0
|
||||
\arg RAMECCMU1_MONITOR1: RAMECCMU1 monitor 1
|
||||
\arg RAMECCMU1_MONITOR2: RAMECCMU1 monitor 2
|
||||
\param[in] flag: RAMECCMU monitor flag
|
||||
one or more parameters can be selected which are shown as below:
|
||||
\arg RAMECCMU_FLAG_ECC_SINGLE_ERROR: ECC single error detected and corrected flag
|
||||
\arg RAMECCMU_FLAG_ECC_DOUBLE_ERROR: ECC double error detected flag
|
||||
\arg RAMECCMU_FLAG_ECC_DOUBLE_ERROR_BYTE_WRITE: ECC double error on byte write detected flag
|
||||
\param[out] none
|
||||
\retval none
|
||||
*/
|
||||
void rameccmu_monitor_flag_clear(rameccmu_monitor_enum rameccmu_monitor, uint32_t flag)
|
||||
{
|
||||
RAMECCMU_MXSTAT(rameccmu_monitor) &= (uint32_t)(~flag);
|
||||
}
|
||||
|
||||
/*!
|
||||
\brief get RAMECCMU monitor ECC interrupt error flag
|
||||
\param[in] rameccmu_monitor: RAMECCMU monitor
|
||||
only one parameter can be selected which is shown as below:
|
||||
\arg RAMECCMU0_MONITOR0: RAMECCMU0 monitor 0
|
||||
\arg RAMECCMU0_MONITOR1: RAMECCMU0 monitor 1
|
||||
\arg RAMECCMU0_MONITOR2: RAMECCMU0 monitor 2
|
||||
\arg RAMECCMU0_MONITOR3: RAMECCMU0 monitor 3
|
||||
\arg RAMECCMU0_MONITOR4: RAMECCMU0 monitor 4
|
||||
\arg RAMECCMU1_MONITOR0: RAMECCMU1 monitor 0
|
||||
\arg RAMECCMU1_MONITOR1: RAMECCMU1 monitor 1
|
||||
\arg RAMECCMU1_MONITOR2: RAMECCMU1 monitor 2
|
||||
\param[in] int_flag: RAMECCMU monitor flag
|
||||
one or more parameters can be selected which are shown as below:
|
||||
\arg RAMECCMU_INT_FLAG_ECC_SINGLE_ERROR: ECC single error detected and corrected flag
|
||||
\arg RAMECCMU_INT_FLAG_ECC_DOUBLE_ERROR: ECC double error detected flag
|
||||
\arg RAMECCMU_INT_FLAG_ECC_DOUBLE_ERROR_BYTE_WRITE: ECC double error on byte write detected flag
|
||||
\param[out] none
|
||||
\retval none
|
||||
*/
|
||||
FlagStatus rameccmu_monitor_interrupt_flag_get(rameccmu_monitor_enum rameccmu_monitor, uint32_t int_flag)
|
||||
{
|
||||
uint32_t ret1 = RESET;
|
||||
uint32_t ret2 = RESET;
|
||||
|
||||
/* get the status of interrupt enable bit */
|
||||
ret1 = RAMECCMU_MXCTL(rameccmu_monitor) & (uint32_t)(int_flag << 2U);
|
||||
/* get the status of interrupt flag */
|
||||
ret2 = RAMECCMU_MXSTAT(rameccmu_monitor) & int_flag;
|
||||
|
||||
if(ret1 && ret2) {
|
||||
return SET;
|
||||
} else {
|
||||
return RESET;
|
||||
}
|
||||
}
|
||||
|
||||
/*!
|
||||
\brief clear RAMECCMU monitor interrupt ECC error flag
|
||||
\param[in] rameccmu_monitor: RAMECCMU monitor
|
||||
only one parameter can be selected which is shown as below:
|
||||
\arg RAMECCMU0_MONITOR0: RAMECCMU0 monitor 0
|
||||
\arg RAMECCMU0_MONITOR1: RAMECCMU0 monitor 1
|
||||
\arg RAMECCMU0_MONITOR2: RAMECCMU0 monitor 2
|
||||
\arg RAMECCMU0_MONITOR3: RAMECCMU0 monitor 3
|
||||
\arg RAMECCMU0_MONITOR4: RAMECCMU0 monitor 4
|
||||
\arg RAMECCMU1_MONITOR0: RAMECCMU1 monitor 0
|
||||
\arg RAMECCMU1_MONITOR1: RAMECCMU1 monitor 1
|
||||
\arg RAMECCMU1_MONITOR2: RAMECCMU1 monitor 2
|
||||
\param[in] int_flag: RAMECCMU monitor flag
|
||||
one or more parameters can be selected which are shown as below:
|
||||
\arg RAMECCMU_INT_FLAG_ECC_SINGLE_ERROR: ECC single error detected and corrected flag
|
||||
\arg RAMECCMU_INT_FLAG_ECC_DOUBLE_ERROR: ECC double error detected flag
|
||||
\arg RAMECCMU_INT_FLAG_ECC_DOUBLE_ERROR_BYTE_WRITE: ECC double error on byte write detected flag
|
||||
\param[out] none
|
||||
\retval none
|
||||
*/
|
||||
void rameccmu_monitor_interrupt_flag_clear(rameccmu_monitor_enum rameccmu_monitor, uint32_t int_flag)
|
||||
{
|
||||
RAMECCMU_MXSTAT(rameccmu_monitor) &= (uint32_t)(~int_flag);
|
||||
}
|
||||
Reference in New Issue
Block a user