Initial commit: CCU621_M firmware project with BLE debug link support.
Co-authored-by: Cursor <cursoragent@cursor.com>
This commit is contained in:
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/*!
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\file gd32h7xx_trng.c
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\brief TRNG driver
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\version 2025-01-24, V1.4.0, firmware for GD32H7xx
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*/
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/*
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Copyright (c) 2025, GigaDevice Semiconductor Inc.
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Redistribution and use in source and binary forms, with or without modification,
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are permitted provided that the following conditions are met:
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1. Redistributions of source code must retain the above copyright notice, this
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list of conditions and the following disclaimer.
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2. Redistributions in binary form must reproduce the above copyright notice,
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this list of conditions and the following disclaimer in the documentation
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and/or other materials provided with the distribution.
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3. Neither the name of the copyright holder nor the names of its contributors
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may be used to endorse or promote products derived from this software without
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specific prior written permission.
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THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
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AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
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WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
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IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
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INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
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NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR
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PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
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WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
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ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY
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OF SUCH DAMAGE.
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*/
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#include "gd32h7xx_trng.h"
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/*!
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\brief deinitialize the TRNG
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\param[in] none
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\param[out] none
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\retval none
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*/
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void trng_deinit(void)
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{
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rcu_periph_reset_enable(RCU_TRNGRST);
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rcu_periph_reset_disable(RCU_TRNGRST);
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}
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/*!
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\brief enable the TRNG interface
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\param[in] none
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\param[out] none
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\retval none
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*/
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void trng_enable(void)
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{
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uint32_t trng_config = TRNG_CTL;
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trng_config &= ~TRNG_CTL_CONDRST;
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trng_config |= TRNG_CTL_TRNGEN;
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TRNG_CTL = trng_config;
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}
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/*!
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\brief disable the TRNG interface
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\param[in] none
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\param[out] none
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\retval none
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*/
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void trng_disable(void)
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{
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TRNG_CTL &= ~TRNG_CTL_TRNGEN;
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}
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/*!
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\brief lock the TRNG control bits
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\param[in] none
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\param[out] none
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\retval none
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*/
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void trng_lock(void)
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{
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TRNG_CTL |= TRNG_CTL_LK;
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}
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/*!
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\brief configure TRNG working mode
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\param[in] mode_select: the TRNG working mode
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only one parameter can be selected which is shown as below:
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\arg TRNG_MODSEL_LFSR: TRNG working in LFSR mode
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\arg TRNG_MODSEL_NIST: TRNG working in NIST mode
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\param[out] none
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\retval none
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*/
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void trng_mode_config(trng_modsel_enum mode_select)
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{
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uint32_t trng_config = TRNG_CTL;
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trng_config &= ~TRNG_CTL_MODSEL;
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trng_config |= mode_select;
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TRNG_CTL = trng_config;
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}
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/*!
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\brief enable the TRNG post-processing module
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\param[in] none
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\param[out] none
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\retval none
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*/
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void trng_postprocessing_enable(void)
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{
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TRNG_CTL |= TRNG_CTL_PPEN;
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}
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/*!
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\brief disable the TRNG post-processing module
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\param[in] none
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\param[out] none
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\retval none
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*/
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void trng_postprocessing_disable(void)
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{
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TRNG_CTL &= ~TRNG_CTL_PPEN;
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}
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/*!
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\brief enable the TRNG conditioning module
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\param[in] none
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\param[out] none
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\retval none
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*/
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void trng_conditioning_enable(void)
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{
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TRNG_CTL |= TRNG_CTL_CONDEN;
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}
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/*!
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\brief disable the TRNG conditioning module
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\param[in] none
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\param[out] none
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\retval none
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*/
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void trng_conditioning_disable(void)
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{
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TRNG_CTL &= ~TRNG_CTL_CONDEN;
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}
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/*!
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\brief configure TRNG conditioning module input bitwidth
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\param[in] input_bitwidth: the input bit width
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only one parameter can be selected which is shown as below:
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\arg TRNG_INMOD_256BIT: conditioning module input bitwidth 256bits
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\arg TRNG_INMOD_440BIT: conditioning module input bitwidth 440bits
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\param[out] none
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\retval none
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*/
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void trng_conditioning_input_bitwidth(trng_inmod_enum input_bitwidth)
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{
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uint32_t trng_config = TRNG_CTL;
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trng_config &= ~TRNG_CTL_INMOD;
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trng_config |= input_bitwidth;
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TRNG_CTL = trng_config;
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}
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/*!
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\brief configure TRNG conditioning module output bitwidth
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\param[in] output_bitwidth:
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only one parameter can be selected which is shown as below:
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\arg TRNG_OUTMOD_128BIT: conditioning module output bitwidth 128bits
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\arg TRNG_OUTMOD_256BIT: conditioning module output bitwidth 256bits
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\param[out] none
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\retval none
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*/
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void trng_conditioning_output_bitwidth(trng_outmod_enum output_bitwidth)
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{
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uint32_t trng_config = TRNG_CTL;
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trng_config &= ~TRNG_CTL_OUTMOD;
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trng_config |= (uint32_t)output_bitwidth;
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TRNG_CTL = trng_config;
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}
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/*!
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\brief enable TRNG replace test
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\param[in] none
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\param[out] none
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\retval none
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*/
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void trng_replace_test_enable(void)
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{
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TRNG_CTL |= TRNG_CTL_RTEN;
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}
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/*!
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\brief disable TRNG replace test
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\param[in] none
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\param[out] none
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\retval none
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*/
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void trng_replace_test_disable(void)
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{
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TRNG_CTL &= ~TRNG_CTL_RTEN;
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}
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/*!
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\brief enable hash algorithm init when conditioning module enabled
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\param[in] none
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\param[out] none
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\retval none
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*/
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void trng_hash_init_enable(void)
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{
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TRNG_CTL |= TRNG_CTL_INIT;
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}
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/*!
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\brief disable hash algorithm init when conditioning module enabled
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\param[in] none
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\param[out] none
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\retval none
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*/
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void trng_hash_init_disable(void)
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{
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TRNG_CTL &= ~TRNG_CTL_INIT;
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}
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/*!
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\brief configure TRNG analog power mode
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\param[in] powermode: the power mode selection
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only one parameter can be selected which is shown as below:
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\arg TRNG_NR_ULTRALOW: TRNG analog power mode ultralow
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\arg TRNG_NR_LOW: TRNG analog power mode low
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\arg TRNG_NR_MEDIUM: TRNG analog power mode medium
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\arg TRNG_NR_HIGH: TRNG analog power mode high
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\param[out] none
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\retval none
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*/
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void trng_powermode_config(uint32_t powermode)
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{
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uint32_t trng_config = TRNG_CTL;
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trng_config &= ~TRNG_CTL_NR;
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trng_config |= powermode;
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TRNG_CTL = trng_config;
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}
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/*!
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\brief configure TRNG clock divider
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\param[in] clkdiv: TRNG clock divider
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only one parameter can be selected which is shown as below:
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\arg TRNG_CLK_DIVx (x=1, 2, 4, 8, 16, 32, 64, 128, 256, 512, 1024, 2048, 4096, 8192, 16384, 32768)
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\param[out] none
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\retval none
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*/
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void trng_clockdiv_config(uint32_t clkdiv)
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{
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uint32_t trng_config = TRNG_CTL;
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trng_config &= ~TRNG_CTL_CLKDIV;
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trng_config |= clkdiv;
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TRNG_CTL = trng_config;
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}
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/*!
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\brief enable the TRNG clock error detection
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\param[in] none
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\param[out] none
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\retval none
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*/
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void trng_clockerror_detection_enable(void)
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{
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TRNG_CTL |= TRNG_CTL_CED;
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}
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/*!
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\brief disable the TRNG clock error detection
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\param[in] none
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\param[out] none
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\retval none
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*/
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void trng_clockerror_detection_disable(void)
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{
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TRNG_CTL &= ~TRNG_CTL_CED;
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}
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/*!
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\brief get the true random data
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\param[in] none
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\param[out] none
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\retval the generated random data
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*/
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uint32_t trng_get_true_random_data(void)
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{
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return (TRNG_DATA);
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}
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/*!
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\brief enable the conditioning logic reset
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\param[in] none
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\param[out] none
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\retval none
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*/
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void trng_conditioning_reset_enable(void)
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{
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TRNG_CTL |= TRNG_CTL_CONDRST;
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}
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/*!
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\brief disable the conditioning logic reset
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\param[in] none
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\param[out] none
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\retval none
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*/
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void trng_conditioning_reset_disable(void)
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{
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TRNG_CTL &= ~TRNG_CTL_CONDRST;
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}
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/*!
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\brief configure the conditioning module hash algorithm
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\param[in] module_algo: module hash algorithm
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only one parameter can be selected which is shown as below:
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\arg TRNG_ALGO_SHA1: TRNG conditioning module hash SHA1
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\arg TRNG_ALGO_MD5: TRNG conditioning module hash MD5
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\arg TRNG_ALGO_SHA224: TRNG conditioning module hash SHA224
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\arg TRNG_ALGO_SHA256: TRNG conditioning module hash SHA256
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\param[out] none
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\retval none
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*/
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void trng_conditioning_algo_config(uint32_t module_algo)
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{
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uint32_t tmp = TRNG_CTL;
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tmp &= ~(TRNG_CTL_ALGO);
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tmp |= module_algo;
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TRNG_CTL = tmp;
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}
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/*!
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\brief configure health tests default value
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\param[in] adpo_threshold: adaptive proportion test threshold value
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\param[in] rep_threshold: repetitive (00/11) test threshold value
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\param[out] none
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\retval none
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*/
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void trng_health_tests_config(uint32_t adpo_threshold, uint8_t rep_threshold)
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{
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uint32_t tmp = TRNG_HTCFG;
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tmp &= ~(TRNG_HTCFG_APTTH | TRNG_HTCFG_RCTTH);
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tmp |= (((uint32_t)(adpo_threshold << 16U) & TRNG_HTCFG_APTTH) | (rep_threshold & TRNG_HTCFG_RCTTH));
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TRNG_HTCFG = tmp;
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}
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/*!
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\brief get the TRNG status flags
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\param[in] flag: TRNG status flag, refer to trng_flag_enum
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only one parameter can be selected which is shown as below:
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\arg TRNG_FLAG_DRDY: random data ready status
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\arg TRNG_FLAG_CECS: clock error current status
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\arg TRNG_FLAG_SECS: seed error current status
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\param[out] none
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\retval FlagStatus: SET or RESET
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*/
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FlagStatus trng_flag_get(trng_flag_enum flag)
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{
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if(RESET != (TRNG_STAT & flag)){
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return SET;
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}else{
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return RESET;
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}
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}
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/*!
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\brief enable the TRNG interrupt
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\param[in] none
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\param[out] none
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\retval none
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*/
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void trng_interrupt_enable(void)
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{
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TRNG_CTL |= TRNG_CTL_IE;
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}
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/*!
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\brief disable the TRNG interrupt
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\param[in] none
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\param[out] none
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\retval none
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*/
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void trng_interrupt_disable(void)
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{
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TRNG_CTL &= ~TRNG_CTL_IE;
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}
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/*!
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\brief get the TRNG interrupt flags
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\param[in] int_flag: TRNG interrupt flag, refer to trng_int_flag_enum
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only one parameter can be selected which is shown as below:
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\arg TRNG_INT_FLAG_CEIF: clock error interrupt flag
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\arg TRNG_INT_FLAG_SEIF: seed error interrupt flag
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\param[out] none
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\retval FlagStatus: SET or RESET
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*/
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FlagStatus trng_interrupt_flag_get(trng_int_flag_enum int_flag)
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{
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if(RESET != (TRNG_STAT & int_flag)){
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return SET;
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}else{
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return RESET;
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}
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}
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/*!
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\brief clear the TRNG interrupt flags
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\param[in] int_flag: TRNG interrupt flag, refer to trng_int_flag_enum
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only one parameter can be selected which is shown as below:
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\arg TRNG_INT_FLAG_CEIF: clock error interrupt flag
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\arg TRNG_INT_FLAG_SEIF: seed error interrupt flag
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\param[out] none
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\retval none
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*/
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void trng_interrupt_flag_clear(trng_int_flag_enum int_flag)
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{
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TRNG_STAT &= ~(uint32_t)int_flag;
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}
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