9ceb218f80
Co-authored-by: Cursor <cursoragent@cursor.com>
221 lines
6.2 KiB
C
221 lines
6.2 KiB
C
/*!
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\file gd32h7xx_it.c
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\brief interrupt service routines
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\version 2025-02-19, V2.1.0, demo for GD32H7xx
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*/
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/*
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Copyright (c) 2024, GigaDevice Semiconductor Inc.
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Redistribution and use in source and binary forms, with or without modification,
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are permitted provided that the following conditions are met:
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1. Redistributions of source code must retain the above copyright notice, this
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list of conditions and the following disclaimer.
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2. Redistributions in binary form must reproduce the above copyright notice,
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this list of conditions and the following disclaimer in the documentation
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and/or other materials provided with the distribution.
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3. Neither the name of the copyright holder nor the names of its contributors
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may be used to endorse or promote products derived from this software without
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specific prior written permission.
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THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
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AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
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WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
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IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
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INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
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NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR
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PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
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WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
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ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY
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OF SUCH DAMAGE.
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*/
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#include "gd32h7xx.h"
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#include "gd32h7xx_it.h"
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#include "main.h"
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#include "semphr.h"
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#include "queue.h"
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#include "lwip/sys.h"
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#include "sys_drv_init.h"
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#include "app_init/app_init.h"
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#include "tim/app_tim.h"
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#include "can.h"
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extern xSemaphoreHandle g_rx_semaphore;
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/*!
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\brief this function handles NMI exception
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\param[in] none
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\param[out] none
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\retval none
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*/
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void NMI_Handler(void)
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{
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/* if NMI exception occurs, go to infinite loop */
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while(1) {
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}
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}
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/*!
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\brief this function handles HardFault exception
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\param[in] none
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\param[out] none
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\retval none
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*/
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void HardFault_Handler(void)
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{
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/* 编码 1:HardFault */
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v_fault_blink_code_loop(1U);
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}
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/*!
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\brief this function handles MemManage exception
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\param[in] none
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\param[out] none
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\retval none
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*/
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void MemManage_Handler(void)
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{
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/* 编码 2:MemManage */
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v_fault_blink_code_loop(2U);
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}
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/*!
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\brief this function handles BusFault exception
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\param[in] none
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\param[out] none
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\retval none
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*/
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void BusFault_Handler(void)
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{
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/* 编码 3:BusFault */
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v_fault_blink_code_loop(3U);
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}
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/*!
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\brief this function handles UsageFault exception
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\param[in] none
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\param[out] none
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\retval none
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*/
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void UsageFault_Handler(void)
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{
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/* 编码 4:UsageFault */
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v_fault_blink_code_loop(4U);
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}
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/*!
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\brief this function handles DebugMon exception
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\param[in] none
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\param[out] none
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\retval none
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*/
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void DebugMon_Handler(void)
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{
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/* if DebugMon exception occurs, go to infinite loop */
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while(1) {
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}
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}
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/*!
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\brief this function handles EXTI10_15 exception
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\param[in] none
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\param[out] none
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\retval none
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*/
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/*!
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\brief this function handles FPU exception
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\param[in] none
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\param[out] none
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\retval none
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*/
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void FPU_IRQHandler(void)
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{
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while(1) {
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}
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}
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#ifdef USE_ENET0
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/*!
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\brief this function handles ethernet interrupt request
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\param[in] none
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\param[out] none
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\retval none
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*/
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void ENET0_IRQHandler(void)
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{
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portBASE_TYPE xHigherPriorityTaskWoken = pdFALSE;
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/* frame received */
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if(SET == enet_interrupt_flag_get(ENET0, ENET_DMA_INT_FLAG_RS)){
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/* give the semaphore to wakeup LwIP task */
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xSemaphoreGiveFromISR(g_rx_semaphore, &xHigherPriorityTaskWoken);
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}
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/* clear the enet DMA Rx interrupt pending bits */
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enet_interrupt_flag_clear(ENET0, ENET_DMA_INT_FLAG_RS_CLR);
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enet_interrupt_flag_clear(ENET0, ENET_DMA_INT_FLAG_NI_CLR);
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/* switch tasks if necessary */
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if(pdFALSE != xHigherPriorityTaskWoken){
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portEND_SWITCHING_ISR(xHigherPriorityTaskWoken);
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}
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}
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#endif /* USE_ENET0 */
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#ifdef USE_ENET1
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/*!
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\brief this function handles ethernet interrupt request
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\param[in] none
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\param[out] none
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\retval none
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*/
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void ENET1_IRQHandler(void)
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{
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portBASE_TYPE xHigherPriorityTaskWoken = pdFALSE;
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/* frame received */
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if(SET == enet_interrupt_flag_get(ENET1, ENET_DMA_INT_FLAG_RS)){
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/* give the semaphore to wakeup LwIP task */
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xSemaphoreGiveFromISR(g_rx_semaphore, &xHigherPriorityTaskWoken);
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}
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/* clear the enet DMA Rx interrupt pending bits */
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enet_interrupt_flag_clear(ENET1, ENET_DMA_INT_FLAG_RS_CLR);
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enet_interrupt_flag_clear(ENET1, ENET_DMA_INT_FLAG_NI_CLR);
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/* switch tasks if necessary */
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if(pdFALSE != xHigherPriorityTaskWoken){
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portEND_SWITCHING_ISR(xHigherPriorityTaskWoken);
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}
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}
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#endif /* USE_ENET1 */
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void TIMER7_UP_IRQHandler(void)
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{
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v_app_tim_irq_handler();
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}
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/* CAN0 IRQs */
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void CAN0_Message_IRQHandler(void) { v_can_irq_handler(0U); }
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void CAN0_Busoff_IRQHandler(void) { v_can_irq_handler(0U); }
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void CAN0_Error_IRQHandler(void) { v_can_irq_handler(0U); }
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void CAN0_TEC_IRQHandler(void) { v_can_irq_handler(0U); }
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void CAN0_REC_IRQHandler(void) { v_can_irq_handler(0U); }
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/* CAN1 IRQs */
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void CAN1_Message_IRQHandler(void) { v_can_irq_handler(1U); }
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void CAN1_Busoff_IRQHandler(void) { v_can_irq_handler(1U); }
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void CAN1_Error_IRQHandler(void) { v_can_irq_handler(1U); }
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void CAN1_TEC_IRQHandler(void) { v_can_irq_handler(1U); }
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void CAN1_REC_IRQHandler(void) { v_can_irq_handler(1U); }
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/* CAN2 IRQs */
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void CAN2_Message_IRQHandler(void) { v_can_irq_handler(2U); }
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void CAN2_Busoff_IRQHandler(void) { v_can_irq_handler(2U); }
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void CAN2_Error_IRQHandler(void) { v_can_irq_handler(2U); }
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void CAN2_TEC_IRQHandler(void) { v_can_irq_handler(2U); }
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void CAN2_REC_IRQHandler(void) { v_can_irq_handler(2U); }
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